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Mission Statement

Work in NanoCAD targets equivalent scaling improvements – perhaps as much as one full technology generation by establishing new synergies between various silos of application, architecture, design and manufacturing.

Recent Publications

    [PDF] S. Li, H. Yang, C. W. Wong, V. J. Sorger, and P. Gupta, “ReFOCUS: Reusing Light for Efficient Fourier Optics-Based Photonic Neural Network Accelerator,” in IEEE/ACM International Symposium on Microarchitecture (MICRO), 2023, p. 13
    [PDF] A. Graening, S. Pal, and P. Gupta, “Chiplets: How Small is too Small?,” in Proc. ACM/IEEE Design Automation Conference (DAC), 2023, p. 6
    [PDF] [PDF Slides] T. Li, S. Li, and P. Gupta, “Training Neural Networks for Execution on Approximate Hardware,” in International Research Symposium on Tiny Machine Learning (tinyML), 2023, p. 6
    [PDF] S. Li, H. Yang, C. W. Wong, V. J. Sorger, and P. Gupta, “PhotoFourier: A Photonic Joint Transform Correlator-Based Neural Network Accelerator,” in IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2023, p. 12


Congratulations to Shurui Li for winning the UCLA Dissertation Year Fellowship! Shurui’s work has looked at resource-constrained machine learning especially in context of photonic neural network acceleration. It has already resulted in two tinyML, one MLSys, one HPCA and one Optica paper among others; and he has helped in building working table-top and photonic integrated circuit accelerator prototypes.

Dr. Wojciech Romaszkan is selected the Outstanding Ph.D. Dissertation (“Efficient Machine Learning Acceleration at the Edge”) this year in ECE Department at UCLA. His work (3 tapeouts, 2 best paper nominations) spanned stochastic-computing based scalable, accurate machine learning acceleration architectures. Congratulations, Wojciech Romaszkan !

Congratulations to Wojciech Romaszkan for defending his dissertation! Few more weeks and he is headed to Amazon Annapurna labs.

Prof. Gupta is going to lead the System-Driven Functional Integration and Aggregation theme within the recently funded JUMP 2.0 CHIMES center. See the UCLA press release here.


A lot of press coverage for our recent DAC paper on design of chiplet-based waferscale processors: HPCWire, EENewsEurope, Tom’s Hardware.

Prof. Gupta is elevated to IEEE Fellow.

Prof. Gupta, Prof. Ken Yang and Prof. Pamarti are awarded a new grant under DARPA LTLT project to investigate architectures and design methodologies for ultra-efficient low temperature (77K) processing.

Congratulations to Saptadeep Pal for defending his thesis on “Scale-out Packageless Processing”. Dr Pal is onto much greener pastures at a stealth mode startup.

Congratulations to Irina Alam for defending her thesis. You can find her excellent thesis on “Lightweight Opportunistic Memory Resilience” here . She joins the Apple memory team.

Congratulations to Tianmu and his collaborator, Jiyue Yang from Professor Pamarti’s group for winning this years Qualcomm Innovation Fellowship, for their project “A Stochastic Compute-In-Memory Neural Network Accelerator with Variable Precision Tuning”. Some of the related papers are here and here.


Congratulations to Wojciech Romaszkan and Tianmu Li for being nominated for best paper award at DATE 2020. The ACOUSTIC paper can be found here: [PDF]

The 3PXNet library for sparse-binarized neural network training and inference has been published on Github. More details about 3PXNet can be found in this paper: [PDF]


Prof. Gupta’s article “Goodbye, Motherboard. Hello, Silicon-Interconnect Fabric” appears in IEEE Spectrum. It discusses the emerging chiplet revolution and possibility of packageless processing.

NanoCAD lab gets a new ONR contract on photonic neural networks. This is a joint project with UT Austin and GWU. Our focus is to investigate viable architectures and network training approaches accounting for limitations of optics.

Congratulations to Saptadeep for winning the Qualcomm Innovation Fellowship, 2019! He was among the only 13 teams nation-wide to win this (acceptance rate of 11%). The winning proposal was on Revolutionizing Large-Scale Graph Processing Using Waferscale Architecture. This work is still ongoing, so we cant point you to the stellar paper that would come out of it. But a related paper is here: [PDF].

Congratulations to Saptadeep for being awarded the best talk (“Waferscale GPUs”) at the ECE Department Annual Research Review.

Congratulations to Saptadeep, Tianmu and Wojciech for making it into Qualcomm Innovation Fellowship Finals!

Our HPCA paper on waferscale processors is getting a lot of press coverage. It was covered in ExtremeTech, IEEE Spectrum, Hexus, TechXplore, etc. The paper is here: [PDF] .