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|Work in NanoCAD targets equivalent scaling improvements - perhaps as much as one full technology generation by establishing new synergies between various silos of application, architecture, design and manufacturing.
Congratulations, Mark for winning the Qualcomm Innovation Fellowship! The team of Mark Gottscho and Clayton Schoeny was one of the only 8 teams in the US to be selected (6% acceptance). Details of the winning teams are here. Read about the award on the department website and in the Daily Bruin campus newspaper.
Congratulations to Mark for being one of the finalists for the Qualcomm Innovation Fellowship for his radical new proposal for Software-Defined ECC. It was also presented at the 2016 SELSE Workshop, where the work was selected as a Best of SELSE paper. It will re-appear in a special session at DSN 2016.
Congratulations to Liangzhen Lai for defending his dissertation! Dr. Liangzhen Lai joins ARM Research.
Congratulations to Abde Ali for receiving the Outstanding Dissertation in Circuits and Embedded Systems Award.
Congratulations to Abde Ali for defending his thesis! Dr. Abde Ali Kagalwalla joins Intel.
Congratulations to Mark for receiving the Outstanding M.S. Award in Circuits and Embedded Systems in the department!
Congratulations to Mukul (joining Qualcomm) and Ankur (joining Iowa State University) for completing their M.S.
The VamV paper gets the best interactive presentation award at DATE. See the paper here.
Congratulations to Dr. Rani Ghaida has been selected to receive the 2012 Outstanding Dissertation Award in the area of "New directions in physical design, design for manufacturing and CAD for analogue circuits and MEMS" from the European Design and Automation Association (EDAA) for his dissertation "Design Enablement and Design-Centric Assessment of Future Semiconductor Technologies." His thesis can be found here.
Congratulations to Dr. Rani Ghaida for allowance of patent application "Single Mask Double Patterning". The corresponding journal paper can be found here.
Congratulations to Dr. Rani Ghaida for defending his Ph.D thesis! Rani joins Global Foundries soon.
Congratulations to Dr. John Lee for defending his Ph.D. thesis! He joins KPMG as a data scientist.
Prof. Gupta has been selected to receive 2012 IBM Faculty Award.
Congratulations to Tanaya and Chia-Hao for their jobs at Intel and Marvell respectively.
Gate-length biasing - a design-aware manufacturing technique co-invented by Prof. Gupta reaches the Trillion Watt Hour energy saving mark. See the press release here. This and this paper formed the basis of the company Blaze DFM, that Prof. Gupta co-founded.
SRC issued a press release on the recent "Design-Dependent Process Monitoring" work in Nano CAD Lab. See the press release here. Read the related ICCAD 2010 paper here.
Prof. Gupta gives a half-day tutorial on "Designing for uncertainty: Addressing process variations and aging issues in VLSI designs", at the IEEE International Symposium on VLSI Design, Automation and Test in Hsinchu, Taiwan. See the slides here.
Congratulations and best of luck to Santiago and Parag for their new jobs at Altera.
UCLA is part of the team winning one of the NSF Expeditions in Computing! See http://www.variability.org. Work done in Nano CAD Lab was the primary driver behind the expedition. See the press release here.
Prof. Puneet Gupta receives 2010 SRC Inventor Recognition Award for patent application titled "Single-Mask Double-Patterning Lithography".
Best of luck to Aashish at Mentor Graphics, Amarnath at Intel and Lerong at Sandisk in their new jobs.
Prof. Puneet Gupta receives 2010 ACM/SIGDA Outstanding New Faculty Award. The award was given at DAC 2010 opening ceremony.
Congratulations to Aashish Pant for getting Outstanding M.S. Award from EE Department.
Congratulations to Lerong Cheng for defending his Ph.D. thesis!
Prof. Puneet Gupta receives 2009 SRC Inventor Recognition Award for the US Patent titled "Method for correcting a mask layout" (number 7,149,999).
Prof. Puneet Gupta has been awarded 2009 NSF Faculty Early Career Development (CAREER) Award for his proposal titled ``CAREER: Co-optimization of Integrated Circuit Design and Manufacturing''. See NSF website for further details.
NanoCAD Lab settles in its home at 53-109 Engr. IV! The lab furniture is here. Welcome everyone!
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