WHAT IS PROCEED?
=================
PROCEED is a tool written in MATLAB for evaluating and exploring emerging Boolean devices in the context of circuit designs.
The tool takes a device model (compatible with SPICE) and logic depth histogram of a digital circuit as input and evaluates trade-off of power, minimum working clock period, and area of the digital circuit design. It models and performs circuit optimizations including picking best supply voltage and threshold voltage, gate sizing, and dynamic voltage and frequency scaling. It outputs metrics of design power, minimum working clock period, and design area inwide ranges (up to several orders of magnitudes).


AUTHOR
======
Shaodi Wang, UCLA
Graduate Student Researcher
NanoCAD Lab, Eng IV, 53-109 
Electrical Engineering Department
University of California, Los Angeles
Phone: (310) 825 - 7154
email:shaodiwang@g.ucla.edu


PROJECT DIRECTOR
================
Puneet Gupta, UCLA
Associate Professor
6730C, Boelter Hall,
Box 951594, UCLA,
Los Angeles CA 90095-1594
Phone: (310) 825 - 1376
http://www.ee.ucla.edu/~puneet
email:puneet@ee.ucla.edu


COPYRIGHT NOTICE
================
Copyright 2014 The Regents of the University of California
All Rights Reserved
Created by Shaodi Wang
Electrical Engineering Department, UCLA


DISCLAIMER
==========
This software is provided "As Is" and without any express or implied
warranties. Neither the authors nor any of their employers (including
any of their subsidiaries and subdivisions) are responsible for maintaining
or supporting this software or for any consequences resulting from the
use of this software even if they arise from flaws in the software.


LICENSE
=======
See file LICENSE in PROCEED package.


CONTENTS
========
File/Directory Name       Description
----------------------------------------------------------------------------------
README                    read this file first


LICENSE                   license file


Pareto_optimizer/         PROCEED source codes
+pareto_optimization.m    Pareto optimization [first running step] 
+DVFS.m                   Dynamic voltage and frequency scaling [second running step] [optional]
+Model.sp		  device model file wrapper. Please follow the format

combined_results.m        Combine results generated by pareto_optimization.m and DVFS.m 
                          [third running step]
file_list                 Input specification to combined_results.m, 
                          see file_list_readme.txt for details
cvx_filter.m              Fitting or selecting result after running combined_results.m
                          [fourth running step] [optional]


SYSTEM REQUIREMENTS
===================
This software should run on MATLAB platform.


BUGS
====
Please send all bug reports to Shaodi Wang <shaodiwang@g.ucla.edu>.




ACKNOWLEDGEMENTS
================
This work is supported by IMPACT+ http://impact.ee.ucla.edu
