WHAT IS NOT SUPPORTED:

1) Cells where number of PMOS transistors is different than the number of NMOS transistors. Such cells are ignored in the evaluation.

2) Cells where not all pairs have transistors sharing the same gate signal (see unsupportedCase.bmp file for an illustration).

3) Multiple cell-heights.
 
4) Multiple gate-length. Currently, all drawn gate-length are assumed to be the minimum poly-gate width rule.

5) Poly-contacts placement rules such as staggered and trench contacts. Currently, poly-contacts are assumed to always fit within the cell-area.

