Lab Members

Updated June 13, 2017


Faculty (Principal Investigator)

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Prof. Puneet Gupta

Homepage: http://www.ee.ucla.edu/~puneet
Contact: puneet AT ee DOT ucla DOT edu
Publications

Ph.D

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Wei-Che Wang

Contact: weichewang@ucla.edu
Research interests: Development of computational techniques and models for exploring and optimizing semiconductor technologies.
Industry experience: Taiwan Semiconductor Manufacturing Company (TSMC)
Current research project: Layout optimization for vertical channel devices, Hardware security.
Publications:
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Saptadeep Pal

Contact: saptadeep@ucla.edu
Research interests:Design Methodologies and Architectures for System Integration on Next Generation Interconnects, Development of Silicon Interconnect Fabric, Stochastic Computing, Technology Optimization
Experience: DISCUS, Trinity College Dublin, Ireland; Robert Bosch Centre for Cyber Physical Systems, Bengaluru, India
Publications:
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Irina Alam

Contact: irina1@ucla.edu
Research interests:Opportunistic memory architecture for power and performance benefits, Exploring efficient memory error resilience techniques
Industry experience: Micron Technology Inc., Singapore
Publications:
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Wojciech Romaszkan

Contact: wromaszkan@ucla.edu
Industry experience: Imagination Technologies, UK; NEC, Japan
Publications:

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Tianmu Li

Contact: litianmu1995@ucla.edu
Industry experience:
Publications:
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M.S.

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YooJin Chae

Contact: yoojinchae@ucla.edu
Experience: Synopsys Inc


Undergraduate

Ian Chang

Contact: ichangschool@gmail.com
Current Project: X-Mem

Alumni

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Dr. Yasmine Badr

Contact: ybadr AT ucla DOT edu
Research interests:Algorithms and Computational methods for Design and Technology Co-optimization
Industry Experience: IBM Egypt, CUTEC Institute Germany, Microsoft Research Egypt, Mentor Graphics Egypt, Mentor Graphics U.S., Intel U.S.
Publications:
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Dr. Mark Gottscho

Contact: mgottscho@ucla.edu
PhD thesis: Opportunistic Memory Systems in Presence of Hardware Variability
Previous industry experience: Microsoft Research, Altera, National Aeronautics and Space Administration (NASA)
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Dr. Shaodi Wang

Contact: shaodiwang AT g DOT ucla DOT edu
Research interests: Design for manufacturing modeling, novel device modeling and circuit analysis.
Industry experience: Samsung Semiconductor, ARM
Current projects: Emerging memory technology, Negative differential resistance
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Dr. Liangzhen Lai

Contact: liangzhen AT ucla DOT edu
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Dr. Abde Ali Kagalwalla

Contact: abdeali AT ucla DOT edu
Research interests: Computer-Aided Design of VLSI Systems, Design-for-Manufacturability, Layout Optimization, Lithography
Industry experience: Globalfoundries, Mentor Graphics, Intel
Current research project: EUV Mask Defect Avoidance Strategies, Design Rule Optimization
Publications:
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Vishesh Dokania

Degree: M.S.
Current Coordinates: Cadence
Contact: vdokania AT ucla DOT edu
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Ankur Sharma

Homepage: http://www.ee.ucla.edu/~ankur
Contact: ankursharma AT ucla DOT edu

Mukul Gupta

Contact: mukulg AT ucla DOT edu

Tanaya Sahu

Homepage: https://sites.google.com/site/tanayasahu1987
Contact: tanayasahu AT ucla DOT edu

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Aashish Pant

Homepage: http://www.ee.ucla.edu/~apant
Degree: M.S.
Current Coordinates: Mentor Graphics
Contact: apant AT ucla DOT edu
Publications:
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Amarnath Kasibhatla

Homepage: http://www.ee.ucla.edu/~amar
Degree: M.S.
Current Coordinates: Intel
Contact: amar AT ee DOT ucla DOT edu
Research interests: Power efficient Digital and Analog VLSI design and CAD for Low Power IC design
Publications:
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Charwak S Apte

Contact: charwak AT ee DOT ucla DOT edu
Research interests: Low Power Mixed-signal IC Design
Industry experience: NVIDIA Graphics Pvt Ltd, Qualcomm Inc.
Publications:
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Chia-Hao Chang

Homepage: http://www.ee.ucla.edu/~chiahao
Contact: changchiahao AT ucla DOT edu
Industry experience: Taiwan Semiconductor Manufacturing Company

Dominic Reinhard

Homepage: http://www.ee.ucla.edu/~lerong
Degree: M.S.
Current Coordinates: Western Digital
Contact: dominicr AT ucla DOT edu
M.S. Report:
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George Torres

Degree: B.S.
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Dr. John Lee

Homepage: http://www.ee.ucla.edu/~lee
Degree: Ph.D.
Current Coordinates: TBD
Contact: lee at ee dot ucla
Publications:
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Dr. Lerong Cheng

Homepage: http://www.ee.ucla.edu/~lerong
Degree: Ph.D.
Current Coordinates: Sandisk
Contact: lerong AT ucla DOT edu
Publications and Thesis:
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Parag Kulkarni

Degree: M.S.
Current Coordinates: Qualcomm
Contact: paragk AT ucla DOT edu
Research interests: Low Power Digital Logic/Arithmetic Design, CAD algorithms
Industry experience: Altera, Qualcomm, Cadence Design Systems

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Dr. Rani S. Ghaida

Homepage: http://nanocad.ee.ucla.edu/pub/rani
Degree: Ph.D.
Current Coordinates: GLOBALFOUNDRIES
Contact: ranighaida AT ucla DOT edu
Thesis and Publications:
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Santiago Mok

Homepage: http://www.ee.ucla.edu/~smok
Degree: M.S.
Current Coordinates: Altera
Contact: smok AT ee DOT ucla DOT edu

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Tuck Boon Chan

Homepage: http://www.ee.ucla.edu/~tuckie
Current Coordinates: UCSD
Contact: tuckie AT ucla DOT edu
Publications:
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Viswakiran Popuri

Degree: M.S.
Current Coordinates: Sandisk
Contact: viswa AT ee DOT ucla DOT edu
Research interests: Analog/Mixed-signal IC Design and CAD
M.S. Report:
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